This invention relates to testing of liquid crystal display (LCD) panel arrays, and more particularly to a method and apparatus for testing LCD panel arrays for open circuit and pixel defects by applying test signals to panel shorting bars.
LCD panels typically are formed with a liquid crystal material sandwiched between an active plate and a ground plate. Polarizers, colorizing filters and spacers also are included between the plates. During fabrication, many active plates may be formed on a single glass plate. In each area of the glass plate which is to form an active plate, drive lines, gate lines and drive elements are formed. Typically, thin-film transistors are used for the drive elements.
Each active panel has an electro-static discharge (ESD) shorting bar at each of the four edges of the active plate. The ESD bar shorts all the drive lines or gate lines which terminate at a respective edge. For an interdigitated panel, drive lines are terminated at two opposing edges while gate lines are terminated at the other two edges. Thus, four shorting bars are included, one per panel edge.
Until scribing and final testing of the LCD panel, the ESD bars remain attached to the panel so as to avoid electro-static charge buildup. Prolonged separation of the panel from the shorting bar or another grounding apparatus may cause the electro-static charge to accumulate and cause damage to the active panel circuitry. Accordingly, a method is needed for testing the LCD panel array with the ESD shorting bars in place.
Referring to FIG. 1, a typical active matrix LCD panel segment 10 is shown consisting of an array of pixels 12. Each pixel 12 is activated by addressing simultaneously an appropriate drive line 14 and gate line 16. A drive element 18 is associated with each pixel 12. The drive lines 14, gate lines 16, pixels 12 and pixel drive elements 18 are deposited on the clear glass "active" plate by a lithographic or similar process. Because of the high pixel densities, the close proximity of the gate lines and drive lines, and the complexity of forming the pixel drive elements, there is a significant probability of defects occurring during the manufacturing process.
Known testing methods for high density LCD panels include contact testing methodologies which require connection to and testing of each individual row/column intersection within the panel array. For such testing, advanced probing technology is necessary to establish reliable contacts among the densely populated pixel elements. A high density LCD array includes 640 by 480 pixel elements per color. A typical test time for such a panel is approximately 2 hours. For a color panel having the three primary colors red green and blue ("RGB color panel"), a typical test cycle requires additional connections and requires additional testing time. The time and expense of testing, although necessary, is a limiting factor to the commercial success of large array LCD panels. A faster and more efficient testing method is needed to reduce the testing costs, and thereby reduce the product costs of LCD panels so as to compete with CRT and other display types.
Accordingly, it is desireable to be able to test large arrays easily, without direct individual electrical connection and with connections only as needed.